1. Field of the Invention
The present invention relates to a demodulator for digitally modulated waves, which are applied to a satellite communication and a satellite broadcasting.
2. Description of the Related Art
In a system for transmitting an image signal or an aural signal, there is a digital modulation technique for improving the quality of transmission and using the efficiency of frequency, which is conventionally used in the field of a microwave ground communication and a satellite communication for commercial use. As a digital modulation system, there are generally used 16 QAM (and 64 QAM) having good frequency using efficiency for a ground microwave line, and BPSK (and QPSK) having a low transmission code error rate for a satellite line.
In recent years, the digital transmission technique has been used for public use. It is considered that the digital transmission technique will be increasingly spread since the digital transmission technique is excellent in obtaining high quality of transmission and improving frequency using efficiency. However, as a system for public use, what is most important is that a receiver is realized with low cost. Then, the following conditions are required.
(1) The structure is simple, and a scale of a hardware is small; PA1 (2) The number of adjusting portions at the initial stage is less; PA1 (3) Aged deterioration and temperature drift are small and a stable operation can be obtained; PA1 (4) The system is suitable for forming an IC; and PA1 (5) A required performances can be satisfied.
As a conventional demodulation system for a ground microwave line, for example, "Design and Characteristic of High Speed QPSK Carrier Synchronizing System", Yamamoto, et al., NTT Study and Utility, Report, No. 24, Vol. 10, 1975, pp. 253-272 shows the use of a demodulator of an inverse modulation type. However, the structure of this type of demodulator is complicated, and the number of adjusting portions at the initial stage is large, and the manufacturing cost increases. Moreover, there is a problem in stability since an analog circuit is mainly used. This type of demodulator is not proper for forming an IC. Therefore, there are many problems in using this type of demodulator for public use.
As one demodulating system so as to solve the above problems, there has been well-known a demodulator to which a digital signal processing technique is applied. For example, this type of demodulator can be seen in "Development of Digital Demodulation LSI for Satellite Communication" Yagi et al., in Autumn National Meeting in 1990 of the Institute of Electronics, Information and Communication Engineers. In demodulating BPSK or QPSK modulated wave, this demodulator employs a digitized phase lock loop (PLL) for regenerating a carrier to demodulate signals (synchronous detection). This satisfies the requirement of manufacturing a receiver at low cost by non-adjustment and LSI.
The following operation of the receiver disclosed in the above document can be obtained.
The supplied QPSK modulated wave is distributed to two circuits, and detected by an in-phase detector and an quadrature detector. Local generating signals, which are supplied to the in-phase detector and the quadrature detector, respectively, denote local oscillating signals of the local oscillator outputting a fixed frequency, which are distributed to a local oscillating signal having a phase of 0 degree and a local oscillating signal having a phase of 90 degrees by a distributor. The outputs of the in-phase detector and the quadrature detector are respectively inputted to A/D converters, and converted to digital values. Moreover, the digitized outputs are inputted to digital low pass filters (digital LPFs) having the same frequency transfer characteristic, respectively, and are spectrum-shaped. These digital LPFs form a transmission characteristic, which is required to prevent intersymbol interference in a digital data transmission. Moreover, these digital LPFs are designed so as to obtain the so-called roll-off characteristic when a filter characteristic on a transmission side is combined with the above digital LPFs. Due to this, in the output section of the digital LPFs, each detected output is spectrum-shaped such that an Eye-opening rate becomes sufficiently large. The respective outputs of the digital LPFs are supplied to a clock regenerating circuit. In the clock regenerating circuit, competent symbol timing in the signal is extracted, and used as a control input of a clock generator. The output of the clock generator is feedback to the A/D converters. Each of the outputs of the digital LPFs is inputted to a complex multiplier.
In the base band, the complex multiplier can perform the same operation as a frequency converter in an intermediate frequency band, that is, a mixer. The reason the complex multiplier is used as follows.
A multiplier processing not a complex signal but a real signal can only perform the detecting operation but cannot express a negative frequency component in the base band. Due to this, such a multiplier cannot be used as a general frequency converter.
The output of the complex multiplier is inputted to the phase detector, thereby detecting a phase difference between the phase of the input signal and a predetermined phase. The output of the phase detector (phase difference data) is inputted to a data discriminating circuit. The data discriminating circuit discriminates QPSK data based on phase difference data, and demodulates data, and outputs the demodulated data.
The phase difference data is inputted from the phase detector to a frequency control terminal of the numerically controlled oscillator (NCO) via a loop filter so as to regenerate the carrier. The NCO is an accumulation and addition circuit, which does not prohibit overflow, and the adding operation is performed in accordance to a value of the signal to be inputted to the frequency control terminal. Due to this, the accumulation and addition circuit is in an oscillating state, and the oscillation frequency varies based on the value of the control signal. In other words, the accumulation and addition circuit operates in the same manner as the operation of a voltage control oscillator (VCO) in an analog circuit. The different point between the above NCO and the conventional VCO is that the oscillation frequency of the NCO is extremely stable. More specifically, the above NCO is characterized in that the above NCO has higher stability than that of the so-called VCXO using crystal and a wide frequency variable range, which the vCXO cannot realize. The output of the NCO is distributed into two and passed through the data converters having sine and cosine characteristics, and supplied to the complex multiplier as a multiplier factor. The loop of one circulation having the phase detector, loop filter, NCO, data converters, and complex multiplier is a phase lock loop (PLL) having the complete digital structure. If a circuit having a complete integral system is included in the loop filter, a frequency pull-in range of PLL is, in principle, infinite, and an ideal operation as a PLL can be expected. The operations after the A/D converters are all performed in a digital signal processing. If an IC formation is made, the demodulator can be realized without adjusting, so that the extremely compact apparatus can be provided.
However, even in the demodulator using the above digital PLL, there remains a problem of the frequency detuning of the frequency converting section comprising the phase detector and the quadrature detector. In the satellite communication and the satellite broadcasting, it is difficult to enhance stability of the frequency converter, which is used to make an up-link frequency and a down-link frequency different, in a relay mounted on the satellite, and generally a large frequency detuning is provided. Moreover, in consideration of the receiver for public use, the manufacturing cost of the down converter of frequency synthesizer type whose frequency is considerably stable is high, and this makes it difficult to spread such type of converter. For this reason, in general, the frequency converting is performed by a circuit whose manufacturing cost is low such as a circuit using a dielectric resonator for local generation. Therefore, if such a frequency converter is used, occurrence of the frequency detuning cannot be avoided.
For example, when a broadcasting wave of 12 GHz band is received and frequency-converted, the converted frequency is shifted from a desired frequency over 1 MHz or more, and inputted into the demodulator. Regarding the demodulator having the above-mentioned digital PLL, the above explained that the frequency pull-in range of PLL was infinite. However, the following problem exists.
That is, it is assumed that detuning occurs in the input frequency and the central frequency (carrier frequency) of the modulated wave spectrum becomes fc, which is a frequency shifted from frequency fL. If the frequency of the local oscillation signal of the fixed frequency is fL, the spectrum of each of the detected outputs is a spectrum whose positive and negative sides are not symmetrical to the frequency 0 (direct current). After the spectrum is digitized, the digitized spectrum is spectrum-shaped by the digital LPF. However, the characteristic of the digital LPF is a band frequency whose positive and negative sides are symmetrical to the frequency 0 (direct current). Due to this, if the detected output is a spectrum, which is a symmetrical to the frequency 0, the spectrum of the detected output is partially cut by the previous detuning component. This means that the transmission characteristic for preventing the intersymbol interference is not satisfied. As a result, the Eye-opening rate becomes small, and the code error rate is deteriorated.